Supercomputers/Systems/HoreKa 2
Germany · operational · mixed
HoreKa 2
Also known as HoreKa 2 / HAICORE 3.0; Hochleistungsrechner Karlsruhe 2
Operated by Karlsruhe Institute of Technology at KIT Campus North .
Researched with AI assistance, checked by scripts. These rows were researched by AI agents reading public operator, laboratory and vendor sources, appended by scripts and checked by automated validation; no subject-matter expert has reviewed them (how this site is made). A mechanical second-reader pass has since fetched every cited source: 1350 of 1540 systems have a readable citation that names them, and 64 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- -
- Rpeak
- 33.00 PFlop/s
- Rmax ÷ Rpeak
- -
- Cores
- 42,000
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - Lenovo ThinkSystem SD665 V3 (CPU partition) and SC777 V4 (GPU partition) systems | Lenovo | - | Reported | nhr.kit.edudocs.nhr.kit.edu |
| Accelerator | - 300 NVIDIA B200 GPUs in 75 GB200 NVL4 nodes (HoreKa Jade), four per node | NVIDIA | 300 reported | Reported | docs.nhr.kit.edukit.edu |
| CPU | AMD EPYC 9005 (Turin) CPUs x86-64 · 192C · 2.7 GHz · TSMC N3E · 500 W 164 HoreKa Onyx nodes with two AMD EPYC 9655 'Turin' each, 192 cores per node | AMD | 328 estimated | Reported | docs.nhr.kit.edunhr.kit.edu |
| CPU | NVIDIA Grace CPUs Armv9 (Neoverse V2) · 72C · 3.1 GHz · TSMC 4N NVIDIA Grace CPUs, two per GB200 NVL4 node across 75 nodes | NVIDIA | 150 estimated | Reported | docs.nhr.kit.edu |
| Interconnect | NVIDIA InfiniBand NDR (Quantum-2) Interconnect Fat tree or dragonfly+ · 400 Gb/s per port · Under 0.6 microseconds InfiniBand NDR200 on the Onyx nodes and two NDR200 links per Jade node | NVIDIA | - | Reported | docs.nhr.kit.edu |
| Storage | - IBM Storage Scale System 6000 with NVMe and HDD tiers | IBM | - | Reported | nhr.kit.edu |
| Cooling | Direct liquid cooling, warm water Cooling Direct-to-chip cold plates, facility water loop · Removes 90+ percent of node heat to liquid Lenovo Neptune hot-water direct liquid cooling with year-round free cooling | Lenovo | - | Reported | kit.edunhr.kit.edu |
AI datacenter metrics
Figures beyond an accelerator count, each with who stated it. What can and cannot be compared across AI datacenters.
| Metric | Value | As of | Basis | Note | Source |
|---|---|---|---|---|---|
| Accelerators | 300 accelerators | 2026-09 | Operator stated | KIT: 300 AI accelerators (documentation: 300 B200 GPUs in 75 GB200 NVL4 nodes) | kit.edudocs.nhr.kit.edu |
The read
KIT's NHR Tier-2 successor to `horeka`, put into operation at a ceremony on 25 September 2026 for a stated total cost of EUR 17 million. KIT's user documentation describes separate x86 and Arm islands: HoreKa Onyx, 164 nodes with two AMD EPYC 9655 each (192 cores per node, in operation since August 2026); HoreKa Jade, 75 NVIDIA GB200 NVL4 nodes with two Grace CPUs and four Blackwell GPUs each (300 GPUs, 144 cores per node), listed as in operation since October 2026 although the node table still marks it coming soon; plus the older Blue, Teal and Ruby nodes that are already counted under `horeka`. The press release's 'more than 42,000 cores' is consistent with Onyx plus Jade (31,488 plus 10,800 cores). Hardware is Lenovo SD665 V3 and SC777 V4 trays with hot-water cooling and IBM Storage Scale System 6000 storage. The 33 PFlop/s is a planned peak, not an HPL result, and there is no TOP500 entry yet; the 300 'AI accelerators' of the press release and the 300 B200 GPUs of the documentation are the same count.
Timeline
- 2026-08 First operational source
Site & facility
Change history
- 2026-10-18 Added HoreKa 2 (KIT)
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.