Supercomputers/Systems/FASTER (Texas A&M)
USA · operational · mixed
FASTER (Texas A&M)
Also known as Fostering Accelerated Sciences Transformation Education and Research
Operated by Texas A&M University .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- -
- Rpeak
- -
- Rmax ÷ Rpeak
- -
- Cores
- -
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - Dell 180-node Intel cluster | Dell Technologies | - | Reported | hprc.tamu.edu |
| Accelerator | - 200 NVIDIA T4 16GB GPUs in the composable pool | NVIDIA | 200 reported | Reported | hprc.tamu.edu |
| Accelerator | - 40 NVIDIA A100 40GB GPUs in the composable pool | NVIDIA | 40 reported | Reported | hprc.tamu.edu |
| Accelerator | - 10 NVIDIA A10 24GB GPUs in the composable pool | NVIDIA | 10 reported | Reported | hprc.tamu.edu |
| Accelerator | - 4 NVIDIA A30 24GB GPUs in the composable pool | NVIDIA | 4 reported | Reported | hprc.tamu.edu |
| Accelerator | - 8 NVIDIA A40 48GB GPUs in the composable pool | NVIDIA | 8 reported | Reported | hprc.tamu.edu |
| CPU | - Intel Xeon 8352Y Ice Lake, two 32-core CPUs per compute node, 180 nodes | Intel | - | Reported | hprc.tamu.edu |
| Interconnect | NVIDIA InfiniBand HDR Interconnect Fat tree or dragonfly+ · 200 Gb/s per port · About 0.6 microseconds Mellanox HDR100 InfiniBand for MPI and storage | NVIDIA | - | Reported | hprc.tamu.edu |
| Interconnect | - Liqid PCIe Gen4 fabric for resource composability | Liqid | - | Reported | hprc.tamu.edu |
| Storage | Lustre Storage Parallel filesystem, separate metadata and object servers 5 PB global Lustre file system | DDN | - | Reported | hprc.tamu.edu |
AI datacenter metrics
Figures beyond an accelerator count, each with who stated it. What can and cannot be compared across AI datacenters.
| Metric | Value | As of | Basis | Note | Source |
|---|---|---|---|---|---|
| Accelerators | 262 accelerators | 2026-10 | Operator stated | Our sum of the composable pool in the Spring 2025 primer (200 T4, 40 A100, 10 A10, 4 A30, 8 A40). | hprc.tamu.edu |
The read
Texas A&M's NSF-funded composable cluster from Dell: 180 compute nodes with two 32-core Intel Xeon 8352Y (Ice Lake) CPUs and 256 GB of RAM each, HDR100 InfiniBand, Liqid PCIe Gen4 for composing GPUs, and 5 PB of DDN Lustre. The Spring 2025 HPRC primer lists a composable GPU pool of 200 T4 16 GB, 40 A100 40 GB, 10 A10, 4 A30 and 8 A40 GPUs (262 GPUs by our arithmetic). No FLOPS figure or commissioning date is given in the document, so cores (about 11,520 on compute nodes by arithmetic) are left blank.
Timeline
No dated events recorded.
Change history
- 2026-10-07 Added FASTER (Texas A&M)
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| hprc.tamu.edu | names system only | - |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.