Supercomputers/Systems/Tinkercliffs
USA · operational · mixed
Tinkercliffs
Also known as TinkerCliffs
Operated by Virginia Tech at Virginia Tech Steger Hall HPC Data Center .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- -
- Rpeak
- -
- Rmax ÷ Rpeak
- -
- Cores
- 41,600
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Accelerator | - 14 nodes with eight NVIDIA A100 80 GB each (112 A100 as stated by ARC) | NVIDIA | 112 reported | Reported | docs.arc.vt.edu |
| Accelerator | NVIDIA H200 SXM Accelerators CUDA (Hopper GH100) · 16,896C · 1.98 GHz · TSMC 4N · 700 W 6 nodes with eight NVIDIA H200 141 GB each (48 H200 as stated by ARC) | NVIDIA | 48 reported | Reported | docs.arc.vt.edu |
| CPU | - 288 base compute nodes with AMD EPYC 7702 Zen 2 (128 cores per node; quantity is nodes) | AMD | 288 reported | Reported | docs.arc.vt.edu |
| CPU | AMD EPYC 7742 (Rome) CPUs x86-64 · 64C · 2.25 GHz · 7 nm · 225 W 14 A100 GPU nodes with AMD EPYC 7742 (quantity is nodes; 10 of them DGX A100) | AMD | 14 reported | Reported | docs.arc.vt.edu |
| CPU | - 16 nodes with Intel Xeon Platinum 9242 (96 cores per node; quantity is nodes) | Intel | 16 reported | Reported | docs.arc.vt.edu |
| Interconnect | NVIDIA InfiniBand HDR Interconnect Fat tree or dragonfly+ · 200 Gb/s per port · About 0.6 microseconds HDR InfiniBand, HDR-100 to 8x HDR-200 depending on node type | NVIDIA | - | Reported | docs.arc.vt.edu |
| Storage | IBM Spectrum Scale ESS (GPFS) Storage Parallel filesystem (GPFS), erasure-coded declustered RAID · 250 PB on Summit (Alpine) · About 2.5 TB/s IBM ESS GPFS project storage | IBM | - | Reported | docs.arc.vt.edu |
| Storage | - VAST NVMe high-performance file system | VAST Data | - | Reported | docs.arc.vt.edu |
The read
Virginia Tech Advanced Research Computing's flagship CPU and GPU cluster in the Steger Hall HPC data center, online since summer 2020. The ARC documentation lists 332 nodes, 41,600 CPU cores and 130 TB of RAM: 288 AMD EPYC 7702 nodes (128 cores, 256 GB), 8 high-memory EPYC 7702 nodes (1 TB), 16 Intel Xeon Platinum 9242 nodes, 14 GPU nodes with eight NVIDIA A100 80 GB each (10 of them DGX A100), and 6 nodes with eight NVIDIA H200 141 GB each, for 112 A100 and 48 H200 GPUs. Interconnect is HDR InfiniBand (HDR-100 to 8x HDR-200 depending on node type); storage is IBM ESS GPFS plus VAST NVMe. Both sources are VT pages, so the tier is reported; no HPL result is published.
Timeline
- 2020 First operational source
Site & facility
Change history
- 2026-10-02 Added Tinkercliffs (Virginia Tech)
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| arc.vt.edu | names system only | - |
| docs.arc.vt.edu | names system, part and count | AMD EPYC 7742 (Rome), NVIDIA H200 SXM · counts: 14, 48 |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.
Storage and I/O
Parallel file systems, why checkpointing dominates the write load, and the metadata failure mode nobody expects.