Supercomputers/Systems/System G (Virginia Tech)
USA · operational · hpc
System G (Virginia Tech)
Also known as SystemG; CHECS System G
Operated by Virginia Tech .
Researched with AI assistance, checked by scripts. These rows were researched by AI agents reading public operator, laboratory and vendor sources, appended by scripts and checked by automated validation; no subject-matter expert has reviewed them (how this site is made). A mechanical second-reader pass has since fetched every cited source: 1350 of 1540 systems have a readable citation that names them, and 64 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- 16.87 TFlop/s
- Rpeak
- 22.94 TFlop/s
- Rmax ÷ Rpeak
- 73.5%
- Cores
- 2,048
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - 325 Apple Mac Pro nodes (TOP500 lists 2,048 cores, manufacturer self-made) | Apple | 325 reported | Reported | newswise.comtop500.org |
| CPU | - Two 4-core 2.8 GHz Intel Xeon processors per node (Xeon E5462 in TOP500) | Intel | - | Reported | newswise.comtop500.org |
| Interconnect | - 40 Gb/s QDR InfiniBand built with Mellanox | Mellanox NVDANASDAQ
rolls up to NVIDIA | - | Reported | newswise.com |
The read
Power-aware research cluster built from Apple Mac Pro workstations by Virginia Tech's Center for High-End Computing Systems, introduced on 18 November 2008 at SC08 as a follow-on to the university's earlier System X (see system-x). The release names Srinidhi Varadarajan and Kirk Cameron as builders and describes 325 Mac Pro nodes, each with two 4-core 2.8 GHz Intel Xeons and 8 GB of RAM, 40 Gb/s QDR InfiniBand built with Mellanox, thousands of power and thermal sensors with Apple partnering on the sensor network, and partial NSF funding; it claims 22.8 TFlops and calls it the world's largest power-aware cluster. TOP500 lists the machine as self-made with 2,048 cores of 2.8 GHz Xeon E5462, 16.87 TFlop/s Rmax and 22.94 TFlop/s peak, ranked 280th in November 2008. The release's 325 nodes would be 2,600 cores against TOP500's 2,048, and its 22.8 TFlops sits close to the TOP500 peak rather than the Linpack result, so the headline number is a peak-style figure. No power draw is stated in either source.
Timeline
- 2008-11 Announced source
- 2008-11 List debut at #280 (November 2008) source
- 2008-11 First operational source
Public list appearances
Pointers only: rank and edition, linking to the canonical entry. We do not reproduce list tables. See sourcing policy.
Change history
- 2026-10-17 System G (Virginia Tech) added from its source pages
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
Every source cited on this page was readable, and none of them mentions this system. They are cited at page granularity, normally because no stable deep link could be found. That is a real weakness in this row and it is why the system carries a confidence tier below verified. See how this check works.
| Cited source | Result | Found on the page |
|---|---|---|
| newswise.com | does not name this system | - |
| top500.org | does not name this system | - |
Checked 2026-10-18 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.