Supercomputers/Systems/Snellius (Phase 2 CPU)
Netherlands · operational · hpc
Snellius (Phase 2 CPU)
Also known as Snellius Phase 2 CPU; Snellius Genoa thin nodes
Operated by SURF at SURF (Amsterdam Science Park) .
Researched with AI assistance, checked by scripts. These rows were researched by AI agents reading public operator, laboratory and vendor sources, appended by scripts and checked by automated validation; no subject-matter expert has reviewed them (how this site is made). A mechanical second-reader pass has since fetched every cited source: 1350 of 1581 systems have a readable citation that names them, and 64 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- 5.40 PFlop/s
- Rpeak
- 5.71 PFlop/s
- Rmax ÷ Rpeak
- 94.6%
- Cores
- 150,912
- Power
- 799 kW
- Per watt
- 6.8 GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
How it compares
Ranked against the other machines in this dataset that report the same figure: those that first came into service within two years of Snellius (Phase 2 CPU), and those in Netherlands. Computed from our tables; a metric is ranked only when at least eight peers report it.
| Metric | Value | Against its era | Against its country |
|---|---|---|---|
| Rmax | 5.40 PFlop/s | #173 of 257 · bottom 34% | #5 of 11 · top 40% |
| Energy efficiency | 6.8 GF/W | #105 of 135 · bottom 23% | #5 of 8 · bottom 44% |
| Rmax ÷ Rpeak | 94.6 % | #4 of 256 · top 1% | #1 of 11 · highest |
| Power draw | 799 kW | #59 of 139 · top 42% | #3 of 9 · top 25% |
Every metric is ranked largest-first, so a high power-draw rank means a big power draw, not a good one. Rmax ÷ Rpeak uses HPL-measured results only. Rankings move as machines are added; they describe this dataset, not the world.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - Lenovo ThinkSystem SD665 V3 | Lenovo | - | Reported | top500.org |
| CPU | AMD EPYC 9004 (Genoa) CPUs x86-64 · 96C · 2.4 GHz · TSMC N5 · 360 W AMD EPYC 9654 96C 2.4GHz, close to 800 thin nodes | AMD | - | Reported | visualization.surf.nltop500.org |
| Interconnect | NVIDIA InfiniBand NDR (Quantum-2) Interconnect Fat tree or dragonfly+ · 400 Gb/s per port · Under 0.6 microseconds Infiniband NDR200 | NVIDIA | - | Reported | top500.org |
| Operating system | Red Hat Enterprise Linux Operating systems Linux distribution · Open source, commercial support subscription RHEL 8.6 | Red Hat | - | Reported | top500.org |
The read
The AMD Genoa thin-node extension of SURF's national supercomputer Snellius. SURF's virtual tour says the Phase 2 extension was put in production in August 2023 and added close to 800 thin nodes with AMD Genoa CPUs plus extra storage, and that the Phase 2 and 3 racks use direct liquid cooling. TOP500 lists it as its own entry: Lenovo ThinkSystem SD665 V3, AMD EPYC 9654 96-core 2.4 GHz, InfiniBand NDR200, RHEL 8.6, 150,912 cores (786 dual-socket nodes of 192 cores by simple division, consistent with SURF's 'close to 800'), Rmax 5.40 and Rpeak 5.71 PFlop/s, 799 kW at measurement level 1 and HPCG 78.9 TFlop/s. SURF's own table of theoretical performance gives 9.3 PFlop/s for all CPU nodes after Phase 2 against 3.2 after Phase 1, which would imply about 6.1 PFlop/s for Phase 2 (a difference of SURF's figures, not a number SURF states) versus TOP500's 5.71. TOP500 rank history: 144th when first listed in November 2023, 165th, 197th (November 2024, the entry recorded here), 230th, 262nd and 287th (June 2026). Sister rows: snellius-phase1-gpu and snellius-phase3-gpu; SURF's Snellius wiki was not reachable, so the node and date facts rest on the virtual tour alone.
Timeline
Public list appearances
Pointers only: rank and edition, linking to the canonical entry. We do not reproduce list tables. See sourcing policy.
Site & facility
SURF (Amsterdam Science Park)
- Location
- Amsterdam, Netherlands
- Commissioned
- 2021
Change history
- 2026-11-01 Added Snellius (Phase 2 CPU)
Nearby in scale
The machines closest to Snellius (Phase 2 CPU) by Rmax, smaller to larger.
- Clementina XXI · Argentina, operational · 5.39 PFlop/s
- Mahti · Finland, decommissioned · 5.39 PFlop/s
- Wind River · USA, operational · 5.33 PFlop/s
- SELENA · France, operational · 5.42 PFlop/s
- CRESCO8 · Italy, operational · 5.43 PFlop/s
- Electra · USA, operational · 5.44 PFlop/s
Related systems
Same site
- Snellius (Phase 1 GPU) · Netherlands, operational, 2021
- Cartesius · Netherlands, decommissioned, 2013
- Huygens · Netherlands, operational, 2008
- Snellius (Phase 3 GPU) · Netherlands, operational
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.