Supercomputers/Systems/Vista (TACC)
USA · operational · mixed
Vista (TACC)
Also known as TACC Vista
Operated by Texas Advanced Computing Center .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- -
- Rpeak
- -
- Rmax ÷ Rpeak
- -
- Cores
- -
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Accelerator | NVIDIA GH200 Grace Hopper Superchip Accelerators Arm CPU + CUDA GPU · TSMC 4N 600 Grace Hopper nodes, one H200 GPU with 96 GB HBM3 each | NVIDIA | 600 reported | Reported | docs.tacc.utexas.eduglennklockwood.com |
| CPU | NVIDIA Grace CPUs Armv9 (Neoverse V2) · 72C · 3.1 GHz · TSMC 4N 256 Grace-Grace nodes (144 cores each) plus Grace CPUs on 600 GH nodes (72 cores each) | NVIDIA | - | Reported | docs.tacc.utexas.edu |
| Interconnect | NVIDIA InfiniBand NDR (Quantum-2) Interconnect Fat tree or dragonfly+ · 400 Gb/s per port · Under 0.6 microseconds NDR 400 Gb/s to GH nodes, NDR200 to GG nodes | NVIDIA | - | Reported | docs.tacc.utexas.edu |
| Storage | - VAST filesystem for home and about 10 PB scratch | VAST Data | - | Reported | docs.tacc.utexas.eduglennklockwood.com |
The read
TACC's NSF-funded AI-centric bridge system between Frontera and Horizon: 600 Grace Hopper (one H200 GPU and 72 Arm cores each) nodes and 256 Grace-Grace (144 cores each) nodes on NVIDIA NDR/NDR200 InfiniBand with a roughly 10 PB VAST scratch filesystem and a Lustre work filesystem. TACC rates a GH node at 34 TFlops FP64 and a GG node at over 7 TFlops FP64. In production for the open science community since September 2024, also serving the NAIRR pilot. No HPL or TOP500 entry was found, so no FLOPS are recorded.
Timeline
- 2024-09 First operational source
Change history
- 2026-10-02 Added Vista, TACC's NSF-funded Grace Hopper bridge to Horizon
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| docs.tacc.utexas.edu | names system, part and count | NVIDIA GH200 Grace Hopper Superchip, NVIDIA Grace, NVIDIA InfiniBand NDR (Quantum-2) · counts: 600 |
| glennklockwood.com | names system and part | NVIDIA GH200 Grace Hopper Superchip |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Inside a node
Why accelerators exist, what the memory hierarchy costs, and how the CPU and accelerator merged onto one package.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.
Storage and I/O
Parallel file systems, why checkpointing dominates the write load, and the metadata failure mode nobody expects.