COMPUTE ATLAS Supercomputer supply-chain graph
1153 systems 482 sites Sourced data

Supercomputers/Systems/PARAM Pravega

India · operational · mixed

PARAM Pravega

Operated by IISc at IISc Bengaluru .

Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.

Measured performance

Rmax
-
vendor peak
Rpeak
3.30 PFlop/s
Rmax ÷ Rpeak
-
Cores
-
Power
-
Per watt
- GF/W

Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.

What this machine is made of

One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.

Role Part Supplier at build Quantity Confidence Source
Integrator -
Atos BullSequana XH2000
Atos - Verified iisc.ac.intheregister.com
Integrator -
Designed and integrated by C-DAC under the National Supercomputing Mission; majority of components manufactured and assembled in India
C-DAC
- Reported iisc.ac.in
Accelerator NVIDIA Tesla V100
Accelerators
CUDA (Volta GV100) · 5,120C · 1.53 GHz · 12 nm · 300 W
NVIDIA Tesla V100 16GB, 80 GPUs across GPU nodes
NVIDIA 80
reported
Reported theregister.com
CPU -
Intel Xeon Cascade Lake 8268, 428 two-socket 48-core CPU nodes
Intel 20,544
reported
Verified theregister.comiisc.ac.in

The read

The largest supercomputer at an Indian academic institution at its debut, installed at the Indian Institute of Science (IISc) Bengaluru under the National Supercomputing Mission and designed and integrated by C-DAC on an Atos BullSequana XH2000 platform. Combines Intel Xeon Cascade Lake 8268 CPU nodes (428 standard nodes totalling 20,544 cores and 1.9 PFlop/s, plus 156 high-memory nodes) with an NVIDIA Tesla V100-accelerated GPU partition, for a stated 3.3 PFlop/s peak across the whole machine. IISc's own event page and The Register's independent account agree on the vendor, the CPU/GPU mix and the 3 February 2022 commissioning date, so the tier is verified; no confirmed TOP500 submission has been found despite contemporary press speculating it would eventually appear near rank 160, so ranked is recorded as 0 and only the operator-stated peak figure is given, not an Rmax.

Timeline

Site & facility

IISc Bengaluru

Location
Bengaluru, India
Commissioned
2022

Change history

Source check

We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.

Cited sourceResultFound on the page
iisc.ac.innames system, part and countNVIDIA Tesla V100 · counts: 80
theregister.comnames system, part and countNVIDIA Tesla V100 · counts: 80

Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.

Further reading