Supercomputers/Systems/KAIROS
France · operational · mixed
KAIROS
Operated by CALMIP at CALMIP Mesocentre .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- 3.05 PFlop/s
- Rpeak
- 3.42 PFlop/s
- Rmax ÷ Rpeak
- 89.2%
- Cores
- 13,056
- Power
- 46.18 kW
- Per watt
- 66.0 GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - BullSequana XH3000 | Eviden | - | Reported | top500.orgcalmip.univ-toulouse.fr |
| Accelerator | NVIDIA GH200 Grace Hopper Superchip Accelerators Arm CPU + CUDA GPU · TSMC 4N NVIDIA GH200 Superchip, 64 GPUs in the accelerated partition | NVIDIA | 64 reported | Reported | calmip.univ-toulouse.frtop500.org |
| CPU | NVIDIA Grace CPUs Armv9 (Neoverse V2) · 72C · 3.1 GHz · TSMC 4N GH Superchip 72C 3GHz | NVIDIA | - | Reported | top500.org |
| Interconnect | NVIDIA InfiniBand NDR (Quantum-2) Interconnect Fat tree or dragonfly+ · 400 Gb/s per port · Under 0.6 microseconds Quad-Rail NVIDIA InfiniBand NDR200 | NVIDIA | - | Reported | top500.orgcalmip.univ-toulouse.fr |
| Operating system | - Red Hat Enterprise Linux | Red Hat | - | Reported | top500.org |
The read
CALMIP's BullSequana XH3000 mesocentre system in Toulouse, which took first place on the November 2025 Green500 at 73.28 GFlops/Watt on only 46 kW for its 3.05 PFlop/s HPL run, ahead of ROMEO-2025 and the Levante GPU extension. TOP500 lists the GH200 accelerated partition (13,056 cores) at 3.05 PFlop/s Rmax and 3.42 PFlop/s Rpeak; CALMIP's own page describes the full system as 120 compute nodes with 24,576 cores, 64 GPUs and 4.77 PFlop/s peak, and states its own HPL figure for the GPU partition as 3.03 PFlop/s, so the two sources differ slightly on Rmax and the TOP500 value is used here. CALMIP planned installation from autumn 2025 and production in summer 2026 as the successor to Olympe, and a July 2026 University of Toulouse article still describes production as upcoming, so no first_operational_date is recorded.
Timeline
Public list appearances
Pointers only: rank and edition, linking to the canonical entry. We do not reproduce list tables. See sourcing policy.
Site & facility
CALMIP Mesocentre
- Location
- Toulouse, France
- Cooling
- Hot water core cooling
- Commissioned
- 2025
Change history
- 2026-10-02 Added KAIROS, CALMIP's GH200 system, No. 1 on the November 2025 Green500
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| top500.org | names system and part | NVIDIA GH200 Grace Hopper Superchip, NVIDIA InfiniBand NDR (Quantum-2) |
| calmip.univ-toulouse.fr | names system, part and count | NVIDIA InfiniBand NDR (Quantum-2) · counts: 64 |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Why accelerators exist, what the memory hierarchy costs, and how the CPU and accelerator merged onto one package.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.