Supercomputers/Systems/HammerHAI
Germany · under construction · ai training
HammerHAI
Operated by HLRS at HLRS, University of Stuttgart .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- -
- Rpeak
- -
- Rmax ÷ Rpeak
- -
- Cores
- -
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - HPE liquid-cooled NVIDIA GB200 NVL4 system | Hewlett Packard Enterprise | - | Reported | hlrs.deitdaily.com |
| Accelerator | - 215 NVIDIA GB200 NVL4 nodes with 860 Blackwell GPUs in total | NVIDIA | 860 reported | Reported | hlrs.de |
| CPU | NVIDIA Grace CPUs Armv9 (Neoverse V2) · 72C · 3.1 GHz · TSMC 4N Two NVIDIA Grace 72-core CPUs per GB200 NVL4 node | NVIDIA | - | Reported | hlrs.de |
| Interconnect | NVIDIA InfiniBand XDR (Quantum-X800) Interconnect Fat tree or dragonfly+ · 800 Gb/s per port NVIDIA Quantum-X800 InfiniBand (800 Gbit/s) and Spectrum-X Ethernet | NVIDIA | - | Reported | hlrs.deitdaily.com |
| Storage | VAST Data Platform Storage Disaggregated shared-everything 10 PB VAST Data DASE storage | VAST Data | - | Reported | hlrs.de |
AI datacenter metrics
Figures beyond an accelerator count, each with who stated it. What can and cannot be compared across AI datacenters.
| Metric | Value | As of | Basis | Note | Source |
|---|---|---|---|---|---|
| Accelerators | 860 accelerators | 2026-10 | Design target | HLRS: 215 NVIDIA GB200 NVL4 nodes, 860 Blackwell GPUs. Under construction. Excludes 13 L4 and Axelera AIPU nodes. | hlrs.de |
The read
The first new standalone supercomputer under the EuroHPC AI Factories initiative, contracted with HPE in March 2026 for the HammerHAI AI Factory at HLRS in Stuttgart. HLRS lists 215 NVIDIA GB200 NVL4 nodes (860 Blackwell GPUs, each node with two 72-core Grace CPUs), 9 Axelera AI nodes due in 2027, 13 nodes with NVIDIA L4 GPUs and 5 RTX A1000 nodes, 10 PB of VAST Data storage and Quantum-X800 InfiniBand, for up to 15 EFlop/s of peak AI inference. Delivery was scheduled for the second quarter of 2026 and operation for the second half of 2026; no confirmation of commissioning was found as of the status date, so it stays under construction. ITdaily independently confirms HPE, the GB200 NVL4 design, Quantum-X800 and the 15 EFlop/s figure but not the node count. Only AI-inference figures are published, so no HPL FLOPS are recorded.
Timeline
- 2026-03 Announced source
Site & facility
HLRS, University of Stuttgart
- Location
- Stuttgart, Germany
- Cooling
- Direct liquid cooling
- Commissioned
- 1996
Change history
- 2026-10-01 Added HammerHAI (HLRS)
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| itdaily.com | names system and part | NVIDIA Grace, NVIDIA InfiniBand XDR (Quantum-X800) |
| hlrs.de | names system and part | NVIDIA Grace, NVIDIA InfiniBand XDR (Quantum-X800), VAST Data Platform |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Why accelerators exist, what the memory hierarchy costs, and how the CPU and accelerator merged onto one package.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.