Supercomputers/Systems/TSUBAME2.0
Japan · upgraded · mixed
TSUBAME2.0
Operated by Institute of Science Tokyo at Institute of Science Tokyo, Ookayama .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- 1.19 PFlop/s
- Rpeak
- 2.29 PFlop/s
- Rmax ÷ Rpeak
- 52.1%
- Cores
- 73,278
- Power
- 1.40 MW
- Per watt
- 0.9 GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - NEC as primary contractor, HP ProLiant SL390 G7 enclosures | NEC | - | Verified | nextplatform.comtop500.org |
| Accelerator | NVIDIA Tesla M2050 Accelerators CUDA (Fermi) · 448C · 1.15 GHz · 40 nm · 225 W three NVIDIA Tesla M2050 per node, 1,408 nodes | NVIDIA | 4,224 estimated | Reported | nextplatform.comnvidianews.nvidia.com |
| CPU | Intel Xeon X5670 CPUs x86-64 · 6C · 2.93 GHz · 32 nm · 95 W two Xeon X5670 per node, 1,408 nodes | Intel | 2,816 estimated | Verified | nextplatform.comtop500.org |
| Interconnect | Mellanox InfiniBand QDR Interconnect Fat tree · 40 Gb/s per 4x port QDR InfiniBand fat tree, roughly 220 Tb/s bisection bandwidth | NVIDIA | - | Verified | nextplatform.comtop500.org |
The read
The predecessor to TSUBAME3.0 and TSUBAME4.0, already in this dataset, and Japan's first petaflop-class system: fourth in the world and first in Japan on the November 2010 TOP500 list. 1,408 HP ProLiant SL390 G7 nodes, each with two Xeon X5670 CPUs and three NVIDIA Tesla M2050 GPUs, built with NEC as the primary contractor and HP (now HPE) supplying the enclosures, on QDR InfiniBand. NVIDIA's own release independently names the same NEC, HP ProLiant SL390 and Xeon-plus-Tesla configuration that TOP500 records, and separately confirms the machine's Green500 efficiency lead under GSIC, the Tokyo Institute of Technology centre that operated it before its 2024 merger into the Institute of Science Tokyo. Upgraded in place to TSUBAME2.5 in 2013 with newer Kepler GPUs, which this dataset does not carry as a separate row. TOP500 is the only source for Rmax, Rpeak and core count, so the tier is reported.
Timeline
Public list appearances
Pointers only: rank and edition, linking to the canonical entry. We do not reproduce list tables. See sourcing policy.
Site & facility
Institute of Science Tokyo, Ookayama
- Location
- Tokyo, Japan
- Cooling
- Direct liquid cooling
- Commissioned
- 2006
Change history
- 2026-09-23 Added, TSUBAME3.0/4.0's predecessor, with a rank pointer on its highest edition
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| nvidianews.nvidia.com | names system and part | Intel Xeon X5670, NVIDIA Tesla M2050 |
| top500.org | names system and part | Intel Xeon X5670, Mellanox InfiniBand QDR |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.