Supercomputers/Systems/SCINet Atlas
USA · operational · hpc
SCINet Atlas
Also known as USDA SCINet Atlas; Atlas (Mississippi State)
Operated by USDA ARS at Mississippi State University HPC2 .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- -
- Rpeak
- 565.00 TFlop/s
- Rmax ÷ Rpeak
- -
- Cores
- -
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - Cray CS500 Linux cluster | Cray HPENYSE
rolls up to Hewlett Packard Enterprise | - | Reported | docs.hpc.msstate.edu |
| Accelerator | NVIDIA Tesla V100 Accelerators CUDA (Volta GV100) · 5,120C · 1.53 GHz · 12 nm · 300 W NVIDIA V100 32 GB GPUs (8) | NVIDIA | 8 reported | Reported | docs.hpc.msstate.edu |
| Accelerator | - NVIDIA A100 80 GB GPUs (40) | NVIDIA | 40 reported | Reported | docs.hpc.msstate.edu |
| Accelerator | NVIDIA L40S Accelerators CUDA (Ada Lovelace) · 350 W NVIDIA L40S 48 GB GPUs (48) | NVIDIA | 48 reported | Reported | docs.hpc.msstate.edu |
| CPU | - Intel Xeon Platinum 8260 24C 2.4 GHz (11,520 cores) plus Xeon Gold 6548Y+ | Intel | - | Reported | docs.hpc.msstate.edu |
| CPU | AMD EPYC 7713 (Milan) CPUs x86-64 · 64C · 2 GHz · 7 nm · 225 W AMD EPYC Milan 7713 (640 cores) | AMD | - | Reported | docs.hpc.msstate.edu |
| Interconnect | NVIDIA InfiniBand HDR Interconnect Fat tree or dragonfly+ · 200 Gb/s per port · About 0.6 microseconds Mellanox HDR InfiniBand at 100 Gbit/s per node | NVIDIA | - | Reported | docs.hpc.msstate.edu |
The read
The USDA Agricultural Research Service's SCINet cluster hosted at Mississippi State University's HPC2 in Starkville, a Cray CS500 with 258 compute nodes (228 standard, 8 big-memory, 21 GPU), 11,520 Intel Xeon Platinum 8260 Cascade Lake cores plus 768 Xeon Gold 6548Y+ and 640 AMD EPYC 7713 cores added later, 101 TB of RAM, 8 V100, 40 A100 and 48 L40S GPUs, and Mellanox HDR 100 Gbit/s InfiniBand, rated at 565 TFlop/s peak by the operator. The SCINet announcement dates general availability to 30 September 2020, and MSU describes the system as a collaboration with USDA-ARS restricted to USDA-ARS users, used for agricultural and environmental research. No TOP500 entry was found, and the peak figure predates the later CPU and GPU additions, so the cores field is left blank.
Timeline
- 2020-09-30 First operational source
Site & facility
Change history
- 2026-10-02 Added SCINet Atlas
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| docs.hpc.msstate.edu | names system, part and count | AMD EPYC 7713 (Milan), NVIDIA Tesla V100, NVIDIA L40S, NVIDIA InfiniBand HDR · counts: 8, 48 |
| scinet.usda.gov | names system only | · counts: 8 |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.