Supercomputers/Systems/Raijin
Japan · decommissioned · hpc
Raijin
Also known as NIFS Plasma Simulator (6th generation)
Operated by NIFS .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- 7.89 PFlop/s
- Rpeak
- 10.51 PFlop/s
- Rmax ÷ Rpeak
- 75.1%
- Cores
- 34,560
- Power
- 1.55 MW
- Per watt
- 5.1 GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - NEC SX-Aurora TSUBASA | NEC | - | Reported | top500.orgnsrp.nifs.ac.jp |
| Accelerator | NEC SX-Aurora TSUBASA Vector Engine Accelerators NEC vector · 8C · 1.6 GHz · 16 nm · 300 W 4,320 SX-Aurora TSUBASA vector engines (Vector Engine Type10AE 8C 1.58GHz) | NEC | 4,320 reported | Reported | nsrp.nifs.ac.jptop500.org |
| Interconnect | NVIDIA InfiniBand HDR Interconnect Fat tree or dragonfly+ · 200 Gb/s per port · About 0.6 microseconds Infiniband HDR200 | NVIDIA | - | Reported | top500.org |
The read
The sixth-generation Plasma Simulator of Japan's National Institute for Fusion Science, an NEC SX-Aurora TSUBASA vector system with 4,320 vector engines, 202 TB of memory, 10.5 petaflops theoretical performance and 32.1 PB of external storage, used for fusion plasma simulation. TOP500 lists NEC Vector Engine Type10AE 8C 1.58GHz over InfiniBand HDR200 with Rmax 7.89 PFlop/s, Rpeak 10.51 PFlop/s, 34,560 cores and 1,550 kW; it debuted on the November 2020 list at rank 33. NIFS's Raijin page says the system operated from 2020 to 2025 before the seventh-generation system Sohsei replaced it, so the decommissioning year is recorded as 2025 with no month; TOP500 still listed it in June 2025. The Rmax, Rpeak and core count come from TOP500 and the architecture details from NIFS, so the tier is reported.
Timeline
- 2020 First operational source
- 2020-11 List debut at #33 (November 2020) source
- 2025 Decommissioned source
Public list appearances
Pointers only: rank and edition, linking to the canonical entry. We do not reproduce list tables. See sourcing policy.
Change history
- 2026-10-01 Added Raijin (NIFS)
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
Every source cited on this page was readable, and none of them mentions this system. They are cited at page granularity, normally because no stable deep link could be found. That is a real weakness in this row and it is why the system carries a confidence tier below verified. See how this check works.
| Cited source | Result | Found on the page |
|---|---|---|
| nsrp.nifs.ac.jp | does not name this system | NEC SX-Aurora TSUBASA Vector Engine · counts: 4320 |
| top500.org | does not name this system | NEC SX-Aurora TSUBASA Vector Engine, NVIDIA InfiniBand HDR |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Why accelerators exist, what the memory hierarchy costs, and how the CPU and accelerator merged onto one package.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.