Supercomputers/Systems/Marconi
Italy · decommissioned · hpc
Marconi
Also known as Marconi Intel Xeon Phi
Operated by CINECA at CINECA (Marconi100 site) .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- 10.38 PFlop/s
- Rpeak
- 18.82 PFlop/s
- Rmax ÷ Rpeak
- 55.2%
- Cores
- 348,000
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - Lenovo NeXtScale | Lenovo | - | Verified | hpc.cineca.itnextplatform.com |
| Accelerator | Intel Xeon Phi 7250 (Knights Landing) Accelerators x86-64 (Knights Landing) · 68C · 1.4 GHz · 14 nm · 215 W Intel Xeon Phi 7250 68C 1.4GHz | Intel | - | Verified | top500.orghpc.cineca.it |
| CPU | Intel Xeon Platinum 8160 CPUs x86-64 · 24C · 2.1 GHz · 14 nm · 150 W Intel Platinum 8160 (later Skylake partition, same TOP500 entry) | Intel | - | Reported | top500.org |
| Interconnect | Omni-Path Architecture Interconnect Fat tree · 100 Gb/s per port · About 1 microsecond Intel Omni-Path | Intel | - | Verified | hpc.cineca.ittop500.org |
The read
CINECA's Lenovo NeXtScale system, built in three partitions on Intel Omni-Path: A1 (Broadwell Xeon E5-2600 v4, mid 2016), A2 (Intel Xeon Phi 7250 'Knights Landing', late 2016, about 250,000 cores per CINECA's own page) and A3 (Xeon Platinum 8160 'Skylake', from November 2018). CINECA's page and TOP500 independently agree on the Lenovo build, the Knights Landing processor and the Omni-Path fabric; TOP500's entry tracks the combined system as it grew, reaching 348,000 cores and 10.38 PFlop/s Rmax (18.82 PFlop/s Rpeak) by its final June 2020 appearance at rank 22, up from rank 12 in November 2016 when the newly-completed KNL partition made it one of the largest Knights Landing deployments in Europe. CINECA's own aggregate peak figure (about 20 PFlop/s across all three partitions) does not match TOP500's per-entry figure, so the tier stays reported rather than verified. No source fetched states a decommission date for this entry distinct from Marconi100, so the last confirmed TOP500 appearance is carried as status_as_of.
Timeline
- 2016 Announced source
- 2016 First operational source
- 2016-11 List debut at #12 (November 2016) source
- 2025-12 Decommissioned source
Public list appearances
Pointers only: rank and edition, linking to the canonical entry. We do not reproduce list tables. See sourcing policy.
Site & facility
Change history
- 2026-10-02 Marked Marconi decommissioned
- 2026-09-24 Marconi added
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| top500.org | names system and part | Intel Xeon Phi 7250 (Knights Landing), Intel Xeon Platinum 8160, Omni-Path Architecture |
| hpc.cineca.it | names system and part | Intel Xeon Phi 7250 (Knights Landing), Intel Xeon Platinum 8160, Omni-Path Architecture |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Inside a node
Why accelerators exist, what the memory hierarchy costs, and how the CPU and accelerator merged onto one package.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.