Supercomputers/Systems/Bridges
USA · decommissioned · hpc
Bridges
Operated by PSC at Pittsburgh Supercomputing Center .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- -
- Rpeak
- -
- Rmax ÷ Rpeak
- -
- Cores
- -
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - HP (delivered as HPE) Apollo 2000 series | Hewlett Packard Enterprise | - | Verified | top500.orgen.wikipedia.org |
| Accelerator | NVIDIA Tesla V100 Accelerators CUDA (Volta GV100) · 5,120C · 1.53 GHz · 12 nm · 300 W 88 NVIDIA Tesla V100 GPUs | NVIDIA | 88 reported | Reported | en.wikipedia.org |
| CPU | - 752 Regular Shared Memory nodes, two Xeon E5-2695 v3 14C 2.3GHz CPUs each | Intel | - | Reported | top500.org |
| Interconnect | Omni-Path Architecture Interconnect Fat tree · 100 Gb/s per port · About 1 microsecond Intel Omni-Path Architecture, among its first production HPC deployments | Intel | - | Reported | top500.org |
The read
PSC's first Bridges system, the predecessor to Bridges-2 (also in this dataset), which replaced it in early 2021. An NSF-funded HP (then, on delivery, HPE) system built around 752 Regular Shared Memory nodes of two Xeon E5-2695 v3 CPUs each, plus GPU nodes carrying NVIDIA K80, P100 and V100 accelerators, over Intel's first production Omni-Path fabric deployment. Aimed like its successor at data-intensive and non-traditional HPC users rather than a Linpack score, it was never submitted to TOP500, so no rank, Rmax, Rpeak, core count or power figure is recorded. The $9.65 million NSF award (number 1445606, to Carnegie Mellon University, PI Shawn Brown) funded an October 2015 acquisition targeting January 2016 production; TOP500's own news coverage describes it booting up and entering production around mid-2016, so only the year is recorded here. Wikipedia states 27,400 total cores across its five node types; that figure is single-sourced and is given in prose only rather than in the structured core-count field.
Timeline
Site & facility
Change history
- 2026-09-23 Added as PSC's predecessor to Bridges-2; it was never submitted to TOP500
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| api.nsf.gov | names system only | · counts: 88 |
| top500.org | names system, part and count | Omni-Path Architecture · counts: 88 |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.