Companies/Hitachi
Tokyo, Japan
Hitachi
Built the SR2201 line jointly with the University of Tsukuba on the CP-PACS project, using its own PA-RISC implementation with pseudo-vector processing. One of the three Japanese vendors, with Fujitsu and NEC, that held the top of the list through the 1990s.
Systems this company appears in
- Systems
- 8
- Aggregate Rmax
- 5.73 TFlop/s
- Aggregate power
- 0 kW
- First appearance
- 1993
- Most recent
- 2001
- Concentration
- 30%
Aggregate Rmax is the sum of the systems this company supplies any part of. It is not revenue and not attributable share: an integrator and a memory vendor in the same machine both count its full FLOPS here. Attribution weighted by role is Phase 4.
Role breakdown
| Role | Systems | Rmax in those systems |
|---|---|---|
| Integrator | 8 | 5.73 TFlop/s |
| CPU | 4 | 2.50 TFlop/s |
| Interconnect | 4 | 2.50 TFlop/s |
| Storage | 1 | 368.2 GFlop/s |
| Cooling | 1 | 368.2 GFlop/s |
| Operating system | 7 | 5.70 TFlop/s |
Appearances
| System | Supplied as | Shipped under | Rmax | Rank |
|---|---|---|---|---|
| UTokyo SR8000/MPP Japan · 2001 | Integrator, Operating system | Hitachi | 1.71 TFlop/s | #5 June 2001 → |
| KEK SR8000-F1/100 Japan · 2000-03 | Integrator, Operating system | Hitachi | 917.0 GFlop/s | #6 June 2000 → |
| ISSP SR8000-F1/60 Japan · 2000-03 | Integrator, Operating system | Hitachi | 577.0 GFlop/s | #17 June 2000 → |
| HLRB SR8000-F1 Germany · 2000 | CPU, Interconnect, Operating system, Integrator | Hitachi | 1.03 TFlop/s | #5 June 2000 → |
| UTokyo SR8000/128 Japan · 1999 | CPU, Interconnect, Operating system, Integrator | Hitachi | 873.0 GFlop/s | #5 November 1999 → |
| CP-PACS Japan · 1996-10 | CPU, Interconnect, Integrator, Operating system, Storage, Cooling | Hitachi | 368.2 GFlop/s | #1 November 1996 → |
| Hitachi SR2201/1024 Japan · 1996 | CPU, Interconnect, Operating system, Integrator | Hitachi | 220.4 GFlop/s | #1 June 1996 → |
| UTokyo HITAC S-3800/480 Japan · 1993 | Integrator | Hitachi | 28.4 GFlop/s | #11 June 1994 → |
Parts supplied
| Part | Category | Generation | Released |
|---|---|---|---|
| Hitachi SR2201 processing unit | CPUs | SR2201 | 1996 |
| Hitachi 3D hyper-crossbar | Interconnect | SR2201 | 1996 |
| Hitachi HI-UX/MPP | Operating systems | HI-UX/MPP | 1996 |
Further reading
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.