Supercomputers/Systems/PARAM Ishan
India · operational · hpc
PARAM Ishan
Also known as IIT Guwahati PARAM Ishan; C-DAC IIT Guwahati Supercomputing Facility
Operated by IIT Guwahati at IIT Guwahati Campus .
Researched with AI assistance, checked by scripts. These rows were researched by AI agents reading public operator, laboratory and vendor sources, appended by scripts and checked by automated validation; no subject-matter expert has reviewed them (how this site is made). A mechanical second-reader pass has since fetched every cited source: 1350 of 1581 systems have a readable citation that names them, and 64 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- -
- Rpeak
- 250.00 TFlop/s
- Rmax ÷ Rpeak
- -
- Cores
- 3,888
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - C-DAC, jointly developed with IIT Guwahati | C-DAC | - | Reported | assamtribune.comgktoday.in |
| Accelerator | - NVIDIA Tesla K40C 12GB, 2 per node on 16 GPU nodes | NVIDIA | 32 estimated | Reported | iitg.ac.in |
| Accelerator | - Intel Xeon Phi 7120P 16GB, 2 per node on 16 Phi nodes | Intel | 32 estimated | Reported | iitg.ac.in |
| CPU | - 2 x Intel Xeon E5-2680 v3 12-core 2.5 GHz per node on 162 nodes | Intel | 324 estimated | Reported | iitg.ac.in |
The read
IIT Guwahati's first PARAM-class cluster, inaugurated by the HRD Minister Prakash Javadekar on 19 September 2016 and still listed on the institute's HPC page as operational (the page, the Assam Tribune and GKToday all give 250 TFlop/s peak). The institute's page lists 126 CPU nodes (two Xeon E5-2680 v3 12-core 2.5 GHz, 64 GB), 4 high-memory nodes of 512 GB, 16 GPU nodes with two NVIDIA Tesla K40C each and 16 nodes with two Xeon Phi 7120P each: 3,888 CPU cores (162 nodes of 24), 92,160 CUDA cores (32 K40C at 2,880), 12 TB of memory and 300 TB of storage. GKToday (20 September 2016) calls it jointly developed by IIT Guwahati and C-DAC and the Assam Tribune names it the C-DAC-IIT Guwahati Supercomputing Facility; neither source gives the interconnect, so none is recorded. The Assam Tribune page metadata shows a 2010 date, which conflicts with its own 19 September dateline and the institute's 2016. The 250 TFlop/s figure is a stated peak and no benchmark result appears on the pages read. Predecessor to param-kamrupa, which is run from the same centre.
Timeline
- 2016-09 First operational source
Site & facility
Change history
- 2026-11-01 Added PARAM Ishan (IIT Guwahati)
Related systems
Same site
- PARAM Kamrupa · India, operational, 2022