Supercomputers/Systems/MHPCC IBM SP2/384
USA · operational · hpc
MHPCC IBM SP2/384
Also known as Maui High Performance Computing Center SP2
Operated by MHPCC DSRC .
Researched with AI assistance, checked by scripts. These rows were researched by AI agents reading public operator, laboratory and vendor sources, appended by scripts and checked by automated validation; no subject-matter expert has reviewed them (how this site is made). A mechanical second-reader pass has since fetched every cited source: 1350 of 1540 systems have a readable citation that names them, and 64 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- 66.3 GFlop/s
- Rpeak
- 102.1 GFlop/s
- Rmax ÷ Rpeak
- 64.9%
- Cores
- 384
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - IBM SP2/384 | IBM | - | Reported | top500.orgnetlib.org |
| CPU | - IBM POWER2 66 MHz, 384 processors | IBM | 384 reported | Reported | top500.orgnetlib.org |
| Operating system | IBM AIX Operating systems Unix (System V-derived) · Proprietary IBM AIX | IBM | - | Reported | top500.org |
The read
IBM SP2 with 384 POWER2 66 MHz processors running AIX at the Maui High-Performance Computing Center in Kihei, Hawaii, Rmax 66.3 and Rpeak 102.14 GFlop/s. TOP500 lists the same configuration from the December 1995 list (rank 8, the list is labelled 11/1995 here) through November 1997 (rank 45) (https://www.top500.org/system/169604/). The 1996 TOP500 report on the top computer centres (https://netlib.org/benchmark/top500/reports/report95/Centers/node14.html), quoting the centre's own web page (the report is dated May 1996), says MHPCC was developed and is managed by a consortium led by the University of New Mexico under a cooperative agreement with the US Air Force Phillips Laboratory, awarded in September 1993 with about 21 million dollars of initial funding, roughly 70 percent for equipment and communications, that it was established in 1994, and that its main resource was a 384-processor SP-2; the same report gives the centre 83.7 GFlop/s in total. TOP500 also holds several smaller or differently sized MHPCC SP2 entries (32, 64 and 400 processors, for example https://www.top500.org/system/169566/ and https://www.top500.org/system/169615/), which look like earlier build-up stages and are not separately modelled. The operator id is the dataset's MHPCC DSRC record, which describes the same Maui centre in its later Air Force Research Laboratory form. The retirement date is unknown.
Timeline
Public list appearances
Pointers only: rank and edition, linking to the canonical entry. We do not reproduce list tables. See sourcing policy.
Change history
- 2026-10-18 Added MHPCC IBM SP2/384 (mhpcc-dsrc)
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
Programming a supercomputer
The software stack beneath the application, and why the OS is now a sovereignty signal as much as a technical choice.