Supercomputers/Systems/CNIC Era
China · operational · hpc
CNIC Era
Also known as Era; Yuan; SCCAS Era
Operated by CNIC, Chinese Academy of Sciences at CNIC Huairou Branch Center .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- 406.80 TFlop/s
- Rpeak
- 542.40 TFlop/s
- Rmax ÷ Rpeak
- 75.0%
- Cores
- 81,360
- Power
- 282 kW
- Per watt
- 1.4 GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - Sugon TC4600H/W580I cluster built by Sugon | Sugon | - | Reported | top500.org |
| Accelerator | - Intel Xeon Phi 5110P coprocessors | Intel | - | Reported | top500.org |
| Accelerator | - NVIDIA Tesla K20 GPUs | NVIDIA | - | Reported | top500.org |
| CPU | - Intel Xeon E5-2680 v3 12C 2.5GHz and Xeon E5-2680 v2 nodes | Intel | - | Reported | top500.org |
| Interconnect | Mellanox InfiniBand FDR Interconnect Fat tree · 56 Gb/s per 4x port · About 1 microsecond InfiniBand FDR interconnect | NVIDIA | - | Reported | top500.org |
The read
The sixth-generation supercomputer of the Supercomputing Center of the Chinese Academy of Sciences, built by Sugon at CNIC's Huairou branch centre in two stages (stage 1 announced 19 June 2014, stage 2 in April 2016). CNIC's own 2017 presentation quotes 2.36 PFlop/s peak for the whole machine, while the TOP500 entry (81,360 cores, 0.41 PFlop/s Rmax) covers the part of it that was benchmarked, so the figures here are the TOP500 submission. Mixes Xeon E5 v2/v3 nodes with Xeon Phi 5110P and Tesla K20 accelerators.
Timeline
- 2014 Announced source
- 2014-06 First operational source
- 2015-11 List debut at #240 (November 2015) source
Public list appearances
Pointers only: rank and edition, linking to the canonical entry. We do not reproduce list tables. See sourcing policy.
Site & facility
Change history
- 2026-10-07 Added CNIC Era
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
Every source cited on this page was readable, and none of them mentions this system. They are cited at page granularity, normally because no stable deep link could be found. That is a real weakness in this row and it is why the system carries a confidence tier below verified. See how this check works.
| Cited source | Result | Found on the page |
|---|---|---|
| indico4.twgrid.org | does not name this system | - |
| top500.org | does not name this system | Mellanox InfiniBand FDR |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
The interconnect
Topologies, why latency and tail behaviour matter more than bandwidth, and how the fabric market consolidated.