Supercomputers/Systems/Albert2
Switzerland · operational · hpc
Albert2
Also known as Albert - DALCO Cluster
Operated by BMW Group at BMW Sauber F1 Team (Hinwil) .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1092 of 1153 systems have a readable citation that names them, and 40 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- 9.60 TFlop/s
- Rpeak
- 12.29 TFlop/s
- Rmax ÷ Rpeak
- 78.2%
- Cores
- 1,024
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| CPU | Intel Xeon 5160 CPUs x86-64 · 2C · 3 GHz · 65 nm Intel Xeon 5160 (Woodcrest) dual-core 3.0GHz | Intel | - | Verified | top500.orgpress.bmwgroup.com |
| Interconnect | Quadrics QsNet Interconnect Fat tree · 340 MB/s per direction · About 2 microseconds Quadrics interconnect | Quadrics | - | Reported | top500.org |
The read
The BMW Sauber Formula One team's Swiss-built CFD cluster, presented 14 December 2006 at the team's Hinwil factory as roughly three times faster than its predecessor Albert on real aerodynamics workloads. BMW's own release and TOP500's listing (as 'Albert - DALCO Cluster', 60th on the November 2006 list) independently agree on the exact 12,288 GFlop/s peak and 1,024-core, 256-node DALCO-built design of dual-socket Intel Xeon 5160 nodes on a Quadrics interconnect, so the tier is verified; TOP500 alone gives the 9,604 GFlop/s measured Rmax. BMW sold its majority stake in the team back to Peter Sauber in 2010 and the team was renamed Sauber F1 Team; no decommissioning notice for the machine itself was found, so status is carried as last documented rather than inferred, following this dataset's convention for old systems with no explicit retirement notice.
Timeline
- 2006-11 List debut at #60 (November 2006) source
- 2006-12 Announced source
- 2006-12 First operational source
Public list appearances
Pointers only: rank and edition, linking to the canonical entry. We do not reproduce list tables. See sourcing policy.
Site & facility
BMW Sauber F1 Team (Hinwil)
- Location
- Hinwil, Switzerland
- Commissioned
- 2006
Change history
- 2026-09-24 Albert2 added, verified on BMW and TOP500
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
| Cited source | Result | Found on the page |
|---|---|---|
| press.bmwgroup.com | names system and part | Intel Xeon 5160 |
| top500.org | names system and part | Intel Xeon 5160, Quadrics QsNet |
Checked 2026-10-09 by pnpm verify. Re-run it and the table changes with the web.