Parts/Memory/GDDR5
Memory · GDDR5 · 2008
GDDR5
Graphics memory on a conventional board-level bus rather than a stacked package. Used in the first generation of GPU compute parts: M2050, K20X and the Xeon Phi coprocessors.
Why this part
The memory every accelerator in this dataset used before stacking existed: discrete chips soldered around the compute die and reached over a wide board-level bus, the same basic approach a graphics card had always used, just with more of it. Tesla M2050, Tesla K20X and the Xeon Phi coprocessors all ran on it, and its bandwidth ceiling, a few hundred GB/s no matter how many chips you add before board routing and power become the limit, is the reason HBM exists at all. GDDR did not stand still either: GDDR5X and later GDDR6 pushed the same board-mounted approach further for parts that did not need HBM's density, which is most consumer and inference-only silicon even today.
Systems using this part
No systems in the current dataset record this part. It is carried in the taxonomy so the graph is complete, and so edges can attach to it as coverage grows.